Senior RF IC Layout Engineer

I am working with a leading technology client seeking a Senior RF IC Layout Engineer to join their team in Belgium. This role focuses on developing next-gen RF technologies.

Responsibilities include, but are not limited to:

• Layout design for RF and analog circuits in RF CMOS and/or RF SOI technologies
• Collaborate with RF designers to improve design performance
• Lead floorplanning and system optimisation
• Work with Cadence and Mentor tools
• Perform parasitic extraction and apply improvements
• Ensure compliance with design rules and optimise layouts

I am looking for an individual with some of the following skills:

• PhD in Electrical Engineering or related field, ideally focused on RF IC or analog layout
• Expertise in Cadence Virtuoso
• Proven experience in GHz-range RF IC layout in CMOS technology
• Familiarity with FinFET technology is an advantage
• Knowledge of layout automation is a plus
• Willingness to relocate to Belgium

Due to the research-driven nature of the work, candidates with a PhD will be best positioned for this opportunity.

If you're an experienced RF IC layout Engineer who is PhD qualified, please contact Parm Shergill.